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 Freescale Semiconductor Technical Data
MC13770/D Rev. 2, 11/2003
MC13770
(Scale 2:1)
MC13770
Single Band LNA and Mixer FEIC
Device
MC13770FC
Package Information Plastic Package Case 1345 (QFN-12) Ordering Information Device Marking
770
Package
QFN-12
1
Introduction
Contents
1 2 3 4 5 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Specifications . . . . . . . . . . . . . . . . Contact Description . . . . . . . . . . . . . . . . . . . . Applications Information . . . . . . . . . . . . . . . . Packaging Information. . . . . . . . . . . . . . . . . . 1 2 4 4 7
The MC13770 is a single band front-end IC designed for wireless receiver applications. It contains a low noise LNA and a high linearity mixer. The LNA is integrated with a bypass switch to preserve input intercept performance. The device is fabricated using Freescale's Advanced RF BiCMOS process using the SiGe:C option and is packaged in a 12 pin Quad Flat Non-leaded package.
1.1
* * * * * * * *
Features
RF Input Frequency: 2100 to 2400 MHz LNA Gain = 15 dB (Typ) LNA Input 3rd Order Intercept Point (IIP3) = 0 dBm (Typ) LNA Noise Figure (NF) = 1.5 dB (Typ) Bypass Mode Included for Improved Intercept Point Performance Double Balanced Mixer Mixer Conversion Gain = 10 dB (Typ) Mixer Noise Figure (NF) = 8.0 dB (Typ)
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. (c) Freescale Semiconductor, Inc., 2003, 2005. All rights reserved.
Electrical Specifications
* *
Mixer Input 3rd Order Intercept Point (IIP3) = -3.0 dBm (Typ) Total Supply Current = 8.0 mA LNA = 3.0 mA Mixer = 5.0 mA
LNA Out Mix In LO In+ LO In-
IF+ LNA In IF-
Bypass Enable Mix Bias
Figure 1. Simplified Block Diagram
2
Electrical Specifications
Table 1. Maximum Ratings
Rating Supply Voltage Storage Temperature Range Operating Temperature Range Symbol VCC Tstg TA Value 3.6 -65 to 150 -40 to 85 Unit V C C
Note: Maximum Ratings and ESD 1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section. 2. ESD (electrostatic discharge) immunity meets Human Body Model (HBM) 100 V and Machine Model (MM) 30 V. Additional ESD data available upon request.
Table 2. Recommended Operating Conditions
Characteristic Supply Voltage Logic Voltage (Enable and Bypass Pins) Input High Voltage Input Low Voltage 0.85 VCC 0 VCC 0.15 VCC Symbol Min 2.7 Typ 2.75 Max 3.0 Unit Vdc V
MC13770 Technical Data, Rev. 2 2 Freescale Semiconductor
Electrical Specifications
Table 3. Electrical Characteristics
Characteristic Turn-on Time Symbol Min Typ 100 Max Unit ns
LNA High Gain Mode (Frequency = 2140 MHz, VCC = 2.75 V, Bypass = 2.75 V, Enable = 2.75 V) LNA Gain LNA Noise Figure LNA Input IP3 LNA Supply Current IDD 15 1.5 0 3.0 dB dB dBm mA
LNA Low Gain Mode (RF = 2140 MHz, VCC = 2.75 V, Bypass = 0 V, Enable = 2.75 V) LNA Gain LNA Noise Figure LNA Input IP3 LNA Supply Current IDD -5.0 5.0 20 10 dB dB dBm A
Mixer Mode (RF = 2140 MHz, LO = 2520 MHz, VCC = 2.75 Vdc, Enable = 2.75 V) Conversion Gain SSB Noise Figure Input IP3 Supply Current LO Drive Level Note: Tone spacing for IIP3 measurement is 5.0 MHz. 10 8.0 -3.0 5.0 -10 dB dB dBm mA dBm
Table 4. Truth Table (1 = 2.75 V, 0 = 0 V)
Enable 0 0 1 1 Bypass 0 1 0 1 Mode Sleep Undefined - do not use Low Gain High Gain
MC13770 Technical Data, Rev. 2 Freescale Semiconductor 3
Contact Description
3
Contact Description
Table 5. Contact Function Description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 Symbol LNA Out Bypass Mix In Enable LO+ LOIF+ IFVCC LNA In Gnd Mix Bias LNA Output LNA Bypass Control Mixer Input Chip Enable Local Oscillator Input + Local Oscillator Input Differential IF Output + Differential IF Output Supply LNA Input Ground Mixer Bias Adjustment Description
4
Applications Information
Figure 2 shows the typical application circuit for 2110 to 2140 MHz band. The Mixer input is internally broadband matched. Two typical IF output match circuits are provided in Table 6 on page 5.
MC13770 Technical Data, Rev. 2 4 Freescale Semiconductor
Applications Information
VCC1 L2 2.7 nH R1 4.3 k L1 2.7 nH 1 C11 1.0 pF Bypass Mix In 2 3 4 5 C6 33 pF Enable LO+ 12 11
C1 33 pF C12 0.5 pF
LNA In
C9 0.01 F C7 33 pF R2 470 LNA Out
10 9
C2 33 pF
C8 0.01 F VCC2
L3 * 8 R3 * C10 *
L4 * C3 *
Mini-Circuits TC8-1 Transformer 8:1
7 C4 * 6 C5 33 pF
IF
* See Table 6 for values.
Figure 2. Application Schematic Table 6. Bill of Material for Application Schematic
Component C3 C4 C10 L3 L4 R3 190 MHz IF 1.2 pF 1.2 pF 1.2 pF 150 nH 150 nH 5.0 k 380 MHz IF 2.2 pF 2.2 pF 1.2 pF 39 nH 39 nH 20 k
Note: All other components are the same for both configurations.
MC13770 Technical Data, Rev. 2 Freescale Semiconductor 5
Applications Information
GND
VCC1 GAIN
1
L N A I N
Serial No#
LNA out IF MIX in
MC13770EVK
VCC2
ENABLE
GND
V2
LO+
Figure 3. Application PCB (Not to Scale)
LO-
MC13770 Technical Data, Rev. 2 6 Freescale Semiconductor
Packaging Information
5
Packaging Information
LASER MARK FOR PIN 1 IDENTIFICATION IN THIS AREA
3
2X
A G
M 0.1 C 1.0 1.00 0.8 0.75 (0.24) (0.5) DETAIL G
VIEW ROTATED 90 CLOCKWISE
0.1 C 3
0.05 C
5
0.05 0.00
2X
C
SEATING PLANE
B
0.1 C
M
0.1 C A B 1.25 0.95 0.1 0.05
12X M M DETAIL M PIN 1 IDENTIFIER
12
CAB C
9
10
EXPOSED DIE ATTACH PAD
8X
(1.177)
4X
0.3 0.18
(45)
1
1.25 0.95
0.1 C A B
12X
7
3
0.065 0.015
3X (R0.09) 4X (0.18)
12X
0.75 0.5
6
4
N 0.5
DETAIL N
CORNER CONFIGURATION
8X
4
VIEW M-M
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. THE COMPLETE JEDEC DESIGNATOR FOR THIS PACKAGE IS: HF-PQFP-N. 4. CORNER CHAMFER MAY NOT BE PRESENT. DIMENSIONS OF OPTIONAL FEATURES ARE FOR REFERENCE ONLY. 5. COPLANARITY APPLIES TO LEADS, CORNER LEADS, AND DIE ATTACH PAD. 2X
DETAIL S
(90)
4X
(0.25)
2X
0.39 0.31
8X
(0.777) 0.1 0.0
DETAIL M
PIN 1 BACKSIDE IDENTIFIER
DETAIL S
PIN 1 BACKSIDE IDENTIFIER
Figure 4. Outline Dimensions for QFN-12 (Case 1345-01, Issue A)
MC13770 Technical Data, Rev. 2 Freescale Semiconductor 7
How to Reach Us:
Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com
RoHS-compliant and/or Pb- free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb- free counterparts. For further information, see http://www.freescale.com or contact your Freescale sales representative. For information on Freescale.s Environmental Products program, go to http://www.freescale.com/epp.
Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals", must be validated for each customer application by customer's technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. FreescaleTM and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. (c) Freescale Semiconductor, Inc., 2003, 2005. All rights reserved.
MC13770/D Rev. 2 11/2003


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